Staff DFT Engineer – Arm Graduate Jobs Great Dunmow

Overview

Position Title: Staff DFT Engineer

Company: Arm

Location: Great Dunmow, UK

Job Description

Arm’s CE-Systems DFT team implements DFT for test chips and hard macros to prove out Arm soft IP power, performance, area, and functionality within the context of an SoC using the latest DFT and process technologies. The DFT team works closely with RTL, Verification, Physical Implementation, and Test engineering teams throughout the life cycle of a project, from an early investigation stage all the way through tape-out and silicon test/characterization on ATE.

Responsibilities:

• Architect, implement, and validate innovative DFT techniques on test chips and hard macros.
• Insert DFT logic into SoC style designs at the RTL level and at the Synthesis gate level, validate all features, and generate ATE targeted test patterns to be run on silicon.
• Work closely with front-end design and verification teams on DFT RTL level insertion, back-end synthesis, place-and-route, and static-timing-analysis teams on DFT gate level insertion and timing closure, and Test and Debug teams on silicon characterization and validation.

Requirements:

• Experience coding Verilog RTL, TCL and/or Perl
• Proficient in Unix/Linux environments
• Core DFT skills considered crucial for this position should include some the following Scan compression and insertion, Memory BIST, Logic BIST, JTAG/IJTAG, at-speed test, ATPG, fault simulation, back-annotated gate level verification, silicon debug
• Experience with Siemens, Cadence, and/or Synopsys DFT and simulation tools